1 Bit CMOS current mode digital full adder

Prashob R. Nair, K. K. Ajayan, A. P. James

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper proposes an improved design of the current mode adder. The circuit operates well at operating voltages of 1.0V. The voltage swing obtained is 0.5V for the SUM node and 0.45V for CARRY node. The performance at frequency of 1 MHz has been studied. Simulations are done on SPICE using BSIM model 3V3.0 for 0.13u real technology. A comparison with respect to the output voltage signal, power and area over the existing design is also made.

Original languageEnglish
Title of host publicationMIPRO 2006 - 29th International Convention Proceedings: Microelectronics, Electronics and Electronic Technologies, MEET, Hypermedia and Grid Systems HGS
PublisherCroatian Society for Information and Communication Technology
Volume1
Publication statusPublished - 2006
Externally publishedYes
EventMIPRO 2006 - 29th International Convention: Microelectronics, Electronics and Electronic Technologies, MEET, Hypermedia and Grid Systems HGS - Opatija, Croatia
Duration: May 22 2006May 26 2006

Other

OtherMIPRO 2006 - 29th International Convention: Microelectronics, Electronics and Electronic Technologies, MEET, Hypermedia and Grid Systems HGS
CountryCroatia
CityOpatija
Period5/22/065/26/06

Fingerprint

adding circuits
Adders
CMOS
Electric potential
electric potential
SPICE
Networks (circuits)
output
simulation

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials
  • Surfaces, Coatings and Films
  • Condensed Matter Physics
  • Atomic and Molecular Physics, and Optics

Cite this

Nair, P. R., Ajayan, K. K., & James, A. P. (2006). 1 Bit CMOS current mode digital full adder. In MIPRO 2006 - 29th International Convention Proceedings: Microelectronics, Electronics and Electronic Technologies, MEET, Hypermedia and Grid Systems HGS (Vol. 1). Croatian Society for Information and Communication Technology.

1 Bit CMOS current mode digital full adder. / Nair, Prashob R.; Ajayan, K. K.; James, A. P.

MIPRO 2006 - 29th International Convention Proceedings: Microelectronics, Electronics and Electronic Technologies, MEET, Hypermedia and Grid Systems HGS. Vol. 1 Croatian Society for Information and Communication Technology, 2006.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Nair, PR, Ajayan, KK & James, AP 2006, 1 Bit CMOS current mode digital full adder. in MIPRO 2006 - 29th International Convention Proceedings: Microelectronics, Electronics and Electronic Technologies, MEET, Hypermedia and Grid Systems HGS. vol. 1, Croatian Society for Information and Communication Technology, MIPRO 2006 - 29th International Convention: Microelectronics, Electronics and Electronic Technologies, MEET, Hypermedia and Grid Systems HGS, Opatija, Croatia, 5/22/06.
Nair PR, Ajayan KK, James AP. 1 Bit CMOS current mode digital full adder. In MIPRO 2006 - 29th International Convention Proceedings: Microelectronics, Electronics and Electronic Technologies, MEET, Hypermedia and Grid Systems HGS. Vol. 1. Croatian Society for Information and Communication Technology. 2006
Nair, Prashob R. ; Ajayan, K. K. ; James, A. P. / 1 Bit CMOS current mode digital full adder. MIPRO 2006 - 29th International Convention Proceedings: Microelectronics, Electronics and Electronic Technologies, MEET, Hypermedia and Grid Systems HGS. Vol. 1 Croatian Society for Information and Communication Technology, 2006.
@inproceedings{293792094c9a4221bb030867ec2f7900,
title = "1 Bit CMOS current mode digital full adder",
abstract = "This paper proposes an improved design of the current mode adder. The circuit operates well at operating voltages of 1.0V. The voltage swing obtained is 0.5V for the SUM node and 0.45V for CARRY node. The performance at frequency of 1 MHz has been studied. Simulations are done on SPICE using BSIM model 3V3.0 for 0.13u real technology. A comparison with respect to the output voltage signal, power and area over the existing design is also made.",
author = "Nair, {Prashob R.} and Ajayan, {K. K.} and James, {A. P.}",
year = "2006",
language = "English",
volume = "1",
booktitle = "MIPRO 2006 - 29th International Convention Proceedings: Microelectronics, Electronics and Electronic Technologies, MEET, Hypermedia and Grid Systems HGS",
publisher = "Croatian Society for Information and Communication Technology",

}

TY - GEN

T1 - 1 Bit CMOS current mode digital full adder

AU - Nair, Prashob R.

AU - Ajayan, K. K.

AU - James, A. P.

PY - 2006

Y1 - 2006

N2 - This paper proposes an improved design of the current mode adder. The circuit operates well at operating voltages of 1.0V. The voltage swing obtained is 0.5V for the SUM node and 0.45V for CARRY node. The performance at frequency of 1 MHz has been studied. Simulations are done on SPICE using BSIM model 3V3.0 for 0.13u real technology. A comparison with respect to the output voltage signal, power and area over the existing design is also made.

AB - This paper proposes an improved design of the current mode adder. The circuit operates well at operating voltages of 1.0V. The voltage swing obtained is 0.5V for the SUM node and 0.45V for CARRY node. The performance at frequency of 1 MHz has been studied. Simulations are done on SPICE using BSIM model 3V3.0 for 0.13u real technology. A comparison with respect to the output voltage signal, power and area over the existing design is also made.

UR - http://www.scopus.com/inward/record.url?scp=84895868031&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84895868031&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:84895868031

VL - 1

BT - MIPRO 2006 - 29th International Convention Proceedings: Microelectronics, Electronics and Electronic Technologies, MEET, Hypermedia and Grid Systems HGS

PB - Croatian Society for Information and Communication Technology

ER -