1 Bit CMOS current mode digital full adder

Prashob R. Nair; K. K. Ajayan; A. P. James

1 Bit CMOS current mode digital full adder

Prashob R. Nair, K. K. Ajayan, A. P. James

Department of Electrical and Computer Engineering

Research output: Contribution to conference › Paper › peer-review

Abstract

This paper proposes an improved design of the current mode adder. The circuit operates well at operating voltages of 1.0V. The voltage swing obtained is 0.5V for the SUM node and 0.45V for CARRY node. The performance at frequency of 1 MHz has been studied. Simulations are done on SPICE using BSIM model 3V3.0 for 0.13u real technology. A comparison with respect to the output voltage signal, power and area over the existing design is also made.

Original language	English
Publication status	Published - Jan 1 2006
Event	MIPRO 2006 - 29th International Convention: Microelectronics, Electronics and Electronic Technologies, MEET, Hypermedia and Grid Systems HGS - Opatija, Croatia Duration: May 22 2006 → May 26 2006

Other

Other	MIPRO 2006 - 29th International Convention: Microelectronics, Electronics and Electronic Technologies, MEET, Hypermedia and Grid Systems HGS
Country	Croatia
City	Opatija
Period	5/22/06 → 5/26/06

ASJC Scopus subject areas

Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials
Surfaces, Coatings and Films
Condensed Matter Physics
Atomic and Molecular Physics, and Optics

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title = "1 Bit CMOS current mode digital full adder",

abstract = "This paper proposes an improved design of the current mode adder. The circuit operates well at operating voltages of 1.0V. The voltage swing obtained is 0.5V for the SUM node and 0.45V for CARRY node. The performance at frequency of 1 MHz has been studied. Simulations are done on SPICE using BSIM model 3V3.0 for 0.13u real technology. A comparison with respect to the output voltage signal, power and area over the existing design is also made.",

author = "Nair, {Prashob R.} and Ajayan, {K. K.} and James, {A. P.}",

year = "2006",

month = jan,

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language = "English",

note = "MIPRO 2006 - 29th International Convention: Microelectronics, Electronics and Electronic Technologies, MEET, Hypermedia and Grid Systems HGS ; Conference date: 22-05-2006 Through 26-05-2006",

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AU - Nair, Prashob R.

AU - Ajayan, K. K.

AU - James, A. P.

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N2 - This paper proposes an improved design of the current mode adder. The circuit operates well at operating voltages of 1.0V. The voltage swing obtained is 0.5V for the SUM node and 0.45V for CARRY node. The performance at frequency of 1 MHz has been studied. Simulations are done on SPICE using BSIM model 3V3.0 for 0.13u real technology. A comparison with respect to the output voltage signal, power and area over the existing design is also made.

AB - This paper proposes an improved design of the current mode adder. The circuit operates well at operating voltages of 1.0V. The voltage swing obtained is 0.5V for the SUM node and 0.45V for CARRY node. The performance at frequency of 1 MHz has been studied. Simulations are done on SPICE using BSIM model 3V3.0 for 0.13u real technology. A comparison with respect to the output voltage signal, power and area over the existing design is also made.

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M3 - Paper

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T2 - MIPRO 2006 - 29th International Convention: Microelectronics, Electronics and Electronic Technologies, MEET, Hypermedia and Grid Systems HGS

Y2 - 22 May 2006 through 26 May 2006

ER -

1 Bit CMOS current mode digital full adder

Abstract

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ASJC Scopus subject areas

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