A Low-Noise Image Sensor Readout Integrated Circuit with Internal Timing Generator

Trong-Hieu Ngo; Ikechi Augustine Ukaegbu; Min-Gun Kim; Hyo-Hoon Park

A Low-Noise Image Sensor Readout Integrated Circuit with Internal Timing Generator

Trong-Hieu Ngo, Ikechi Augustine Ukaegbu, Min-Gun Kim, Hyo-Hoon Park

School of Engineering and Digital Sciences

Research output: Contribution to journal › Article › peer-review

Abstract

We describe the design, development, and performance of a complementary metal-oxide semiconductor (CMOS) image sensor read-out circuit. Designed in a 0.35-m CMOS technology and occupying an area of 2.3 13.6mm 2 , the proposed multipixel image sensor readout integrated circuit with internal timing generator achieves high performance with 188.7-V root mean square (RMS) of ultralow output noise, wide linear dynamic range of 2.3V, low power consumption of 42mA, and a simple timing scheme. The approaches to boost linear dynamic range are presented. The image sensor also provides the trigger signal for data acquisition purpose.

Original language	English
Pages (from-to)	1
Number of pages	4
Journal	IEEE Sensors Letters
Volume	2
Issue number	4
Publication status	Published - Dec 1 2018

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title = "A Low-Noise Image Sensor Readout Integrated Circuit with Internal Timing Generator",

abstract = "We describe the design, development, and performance of a complementary metal-oxide semiconductor (CMOS) image sensor read-out circuit. Designed in a 0.35-m CMOS technology and occupying an area of 2.3 13.6mm 2 , the proposed multipixel image sensor readout integrated circuit with internal timing generator achieves high performance with 188.7-V root mean square (RMS) of ultralow output noise, wide linear dynamic range of 2.3V, low power consumption of 42mA, and a simple timing scheme. The approaches to boost linear dynamic range are presented. The image sensor also provides the trigger signal for data acquisition purpose.",

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N2 - We describe the design, development, and performance of a complementary metal-oxide semiconductor (CMOS) image sensor read-out circuit. Designed in a 0.35-m CMOS technology and occupying an area of 2.3 13.6mm 2 , the proposed multipixel image sensor readout integrated circuit with internal timing generator achieves high performance with 188.7-V root mean square (RMS) of ultralow output noise, wide linear dynamic range of 2.3V, low power consumption of 42mA, and a simple timing scheme. The approaches to boost linear dynamic range are presented. The image sensor also provides the trigger signal for data acquisition purpose.

AB - We describe the design, development, and performance of a complementary metal-oxide semiconductor (CMOS) image sensor read-out circuit. Designed in a 0.35-m CMOS technology and occupying an area of 2.3 13.6mm 2 , the proposed multipixel image sensor readout integrated circuit with internal timing generator achieves high performance with 188.7-V root mean square (RMS) of ultralow output noise, wide linear dynamic range of 2.3V, low power consumption of 42mA, and a simple timing scheme. The approaches to boost linear dynamic range are presented. The image sensor also provides the trigger signal for data acquisition purpose.

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