TY - JOUR
T1 - A unique fault-tolerant design for flying capacitor multilevel inverter
AU - Kou, Xiaomin
AU - Corzine, Keith A.
AU - Familiant, Yakov L.
N1 - Copyright:
Copyright 2008 Elsevier B.V., All rights reserved.
PY - 2004
Y1 - 2004
N2 - This paper presents a unique design for flying capacitor type multilevel inverters with fault-tolerant features. When a single-switch fault per phase occurs, the new design can still provide the same number of converting levels by shorting the fault power semiconductors and reconfiguring the gate controls. The most attractive point of the proposed design is that it can undertake the single-switch fault per phase without sacrificing power converting quality. Future, more, if multiple faults occur in different phases and each phase have only one fault switch, the proposed design can still conditionally provide consistent voltage converting levels. This paper will also discuss the capacitor balancing approach under fault-conditions, which is an essential part of controlling flying capacitor type multilevel inverters. Suggested fault diagnosing methods are also discussed in this paper. Computer simulation and lab results validate the proposed controls.
AB - This paper presents a unique design for flying capacitor type multilevel inverters with fault-tolerant features. When a single-switch fault per phase occurs, the new design can still provide the same number of converting levels by shorting the fault power semiconductors and reconfiguring the gate controls. The most attractive point of the proposed design is that it can undertake the single-switch fault per phase without sacrificing power converting quality. Future, more, if multiple faults occur in different phases and each phase have only one fault switch, the proposed design can still conditionally provide consistent voltage converting levels. This paper will also discuss the capacitor balancing approach under fault-conditions, which is an essential part of controlling flying capacitor type multilevel inverters. Suggested fault diagnosing methods are also discussed in this paper. Computer simulation and lab results validate the proposed controls.
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U2 - 10.1109/TPEL.2004.830037
DO - 10.1109/TPEL.2004.830037
M3 - Article
AN - SCOPUS:3843100453
VL - 19
SP - 979
EP - 987
JO - IEEE Transactions on Power Electronics
JF - IEEE Transactions on Power Electronics
SN - 0885-8993
IS - 4
ER -