An approach to synthesis of reversible circuits for partially specified functions

Marek Perkowski; Robert Fiszer; Pawel Kerntopf; Martin Lukac

doi:10.1109/NANO.2012.6322122

An approach to synthesis of reversible circuits for partially specified functions

Marek Perkowski, Robert Fiszer, Pawel Kerntopf, Martin Lukac

Department of Computer Science

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Citations (Scopus)

Abstract

We provide several extensions of the new approach to the minimization of reversible circuits based on PSE gates and ESOPOS circuits. These circuits realize the Exclusive-Or-Sum-of-Product-Sums (ESOPOS) structure where every output is an exclusive-or of Product-Sum-Exor (PSE) gates which generalize the multi-input Toffoli gates. We also propose a new efficient realization of the PSE gate that uses external-binary, internal-ternary logic.

Original language	English
Title of host publication	2012 12th IEEE International Conference on Nanotechnology, NANO 2012
DOIs	https://doi.org/10.1109/NANO.2012.6322122
Publication status	Published - Nov 22 2012
Event	2012 12th IEEE International Conference on Nanotechnology, NANO 2012 - Birmingham, United Kingdom Duration: Aug 20 2012 → Aug 23 2012

Publication series

Name	Proceedings of the IEEE Conference on Nanotechnology
ISSN (Print)	1944-9399
ISSN (Electronic)	1944-9380

Other

Other	2012 12th IEEE International Conference on Nanotechnology, NANO 2012
Country	United Kingdom
City	Birmingham
Period	8/20/12 → 8/23/12

Keywords

Quantum computing
Reversible circuits

ASJC Scopus subject areas

Bioengineering
Electrical and Electronic Engineering
Materials Chemistry
Condensed Matter Physics

Access to Document

10.1109/NANO.2012.6322122

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Cite this

Perkowski, M., Fiszer, R., Kerntopf, P., & Lukac, M. (2012). An approach to synthesis of reversible circuits for partially specified functions. In 2012 12th IEEE International Conference on Nanotechnology, NANO 2012 [6322122] (Proceedings of the IEEE Conference on Nanotechnology). https://doi.org/10.1109/NANO.2012.6322122

An approach to synthesis of reversible circuits for partially specified functions. / Perkowski, Marek; Fiszer, Robert; Kerntopf, Pawel; Lukac, Martin.

2012 12th IEEE International Conference on Nanotechnology, NANO 2012. 2012. 6322122 (Proceedings of the IEEE Conference on Nanotechnology).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Perkowski, M, Fiszer, R, Kerntopf, P & Lukac, M 2012, An approach to synthesis of reversible circuits for partially specified functions. in 2012 12th IEEE International Conference on Nanotechnology, NANO 2012., 6322122, Proceedings of the IEEE Conference on Nanotechnology, 2012 12th IEEE International Conference on Nanotechnology, NANO 2012, Birmingham, United Kingdom, 8/20/12. https://doi.org/10.1109/NANO.2012.6322122

@inproceedings{a0855744b7be43b8b024964abd6d9447,

title = "An approach to synthesis of reversible circuits for partially specified functions",

abstract = "We provide several extensions of the new approach to the minimization of reversible circuits based on PSE gates and ESOPOS circuits. These circuits realize the Exclusive-Or-Sum-of-Product-Sums (ESOPOS) structure where every output is an exclusive-or of Product-Sum-Exor (PSE) gates which generalize the multi-input Toffoli gates. We also propose a new efficient realization of the PSE gate that uses external-binary, internal-ternary logic.",

keywords = "Quantum computing, Reversible circuits",

author = "Marek Perkowski and Robert Fiszer and Pawel Kerntopf and Martin Lukac",

year = "2012",

month = nov,

day = "22",

doi = "10.1109/NANO.2012.6322122",

language = "English",

isbn = "9781467321983",

series = "Proceedings of the IEEE Conference on Nanotechnology",

booktitle = "2012 12th IEEE International Conference on Nanotechnology, NANO 2012",

note = "2012 12th IEEE International Conference on Nanotechnology, NANO 2012 ; Conference date: 20-08-2012 Through 23-08-2012",

}

TY - GEN

T1 - An approach to synthesis of reversible circuits for partially specified functions

AU - Perkowski, Marek

AU - Fiszer, Robert

AU - Kerntopf, Pawel

AU - Lukac, Martin

PY - 2012/11/22

Y1 - 2012/11/22

N2 - We provide several extensions of the new approach to the minimization of reversible circuits based on PSE gates and ESOPOS circuits. These circuits realize the Exclusive-Or-Sum-of-Product-Sums (ESOPOS) structure where every output is an exclusive-or of Product-Sum-Exor (PSE) gates which generalize the multi-input Toffoli gates. We also propose a new efficient realization of the PSE gate that uses external-binary, internal-ternary logic.

AB - We provide several extensions of the new approach to the minimization of reversible circuits based on PSE gates and ESOPOS circuits. These circuits realize the Exclusive-Or-Sum-of-Product-Sums (ESOPOS) structure where every output is an exclusive-or of Product-Sum-Exor (PSE) gates which generalize the multi-input Toffoli gates. We also propose a new efficient realization of the PSE gate that uses external-binary, internal-ternary logic.

KW - Quantum computing

KW - Reversible circuits

UR - http://www.scopus.com/inward/record.url?scp=84869185595&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84869185595&partnerID=8YFLogxK

U2 - 10.1109/NANO.2012.6322122

DO - 10.1109/NANO.2012.6322122

M3 - Conference contribution

AN - SCOPUS:84869185595

SN - 9781467321983

T3 - Proceedings of the IEEE Conference on Nanotechnology

BT - 2012 12th IEEE International Conference on Nanotechnology, NANO 2012

T2 - 2012 12th IEEE International Conference on Nanotechnology, NANO 2012

Y2 - 20 August 2012 through 23 August 2012

ER -