Binarized Neural Network with Stochastic Memristors

Olga Krestinskaya, Otaniyoz Otaniyozov, Alex Pappachen James

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper proposes the analog hardware implementation of Binarized Neural Network (BNN). Most of the existing hardware implementations of neural networks do not consider the memristor variability issue and its effect on the overall system performance. In this work, we investigate the variability in memristive devices in crossbar dot product computation and leakage currents in the proposed BNN, and show how it effects the overall system performance.

Original languageEnglish
Title of host publicationProceedings 2019 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages274-275
Number of pages2
ISBN (Electronic)9781538678848
DOIs
Publication statusPublished - Mar 1 2019
Event1st IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2019 - Hsinchu, Taiwan
Duration: Mar 18 2019Mar 20 2019

Publication series

NameProceedings 2019 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2019

Conference

Conference1st IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2019
CountryTaiwan
CityHsinchu
Period3/18/193/20/19

Keywords

  • Analog Circuits
  • BNN
  • Memristor Variability
  • Memristors

ASJC Scopus subject areas

  • Artificial Intelligence
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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