TY - GEN
T1 - Carrier-based PWM strategies for the comprehensive capacitor voltage balance of multilevel multileg diode-clamped converters
AU - Busquets-Monge, S.
AU - Ruderman, A.
PY - 2010
Y1 - 2010
N2 - This paper presents four carrier-based PWM strategies for diode-clamped converters of any number of levels and any number of legs (phases). These carrier-based PWM strategies guarantee the dc-link capacitor voltage balance in every switching cycle without the need of additional hardware and with low dc-link capacitance values for any modulation index and load, provided that the sum of leg currents equals zero. The performance of the presented carrier-based PWM strategies, in terms of dc-link capacitor voltage balance and total harmonic distortion in the output line-to-line voltages, is evaluated through simulation, showing a tradeoff between the simplicity of the carrier-based PWM implementation and its total harmonic distortion performance.
AB - This paper presents four carrier-based PWM strategies for diode-clamped converters of any number of levels and any number of legs (phases). These carrier-based PWM strategies guarantee the dc-link capacitor voltage balance in every switching cycle without the need of additional hardware and with low dc-link capacitance values for any modulation index and load, provided that the sum of leg currents equals zero. The performance of the presented carrier-based PWM strategies, in terms of dc-link capacitor voltage balance and total harmonic distortion in the output line-to-line voltages, is evaluated through simulation, showing a tradeoff between the simplicity of the carrier-based PWM implementation and its total harmonic distortion performance.
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U2 - 10.1109/ISIE.2010.5637187
DO - 10.1109/ISIE.2010.5637187
M3 - Conference contribution
AN - SCOPUS:78650328512
SN - 9781424463916
T3 - IEEE International Symposium on Industrial Electronics
SP - 688
EP - 693
BT - ISIE 2010 - 2010 IEEE International Symposium on Industrial Electronics
T2 - 2010 IEEE International Symposium on Industrial Electronics, ISIE 2010
Y2 - 4 July 2010 through 7 July 2010
ER -