Design of CMOS-memristor Circuits for LSTM architecture

Kamilya Smagulova, Kazybek Adam, Olga Krestinskaya, Alex James Pappachen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

12 Citations (Scopus)

Abstract

Long Short-Term memory (LSTM) architecture is a well-known approach for building recurrent neural networks (RNN) useful in sequential processing of data in application to natural language processing. The near-sensor hardware implementation of LSTM is challenged due to large parallelism and complexity. We propose a 0.18 μ m CMOS, GST memristor LSTM hardware architecture for near-sensor processing. The proposed system is validated in a forecasting problem based on Keras model.

Original languageEnglish
Title of host publication2018 IEEE International Conference on Electron Devices and Solid State Circuits, EDSSC 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781538662342
DOIs
Publication statusPublished - Oct 9 2018
Event2018 IEEE International Conference on Electron Devices and Solid State Circuits, EDSSC 2018 - Shenzhen, China
Duration: Jun 6 2018Jun 8 2018

Other

Other2018 IEEE International Conference on Electron Devices and Solid State Circuits, EDSSC 2018
CountryChina
CityShenzhen
Period6/6/186/8/18

Keywords

  • analog circuit
  • crossbar
  • LSTM
  • prediction

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

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