Designing a virtual runtime for FPGA accelerators in the cloud

Mikhail Asiatici, Nithin George, Kizheppatt Vipin, Suhaib A. Fahmy, Paolo Ienne

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

FPGAs can provide high performance and energy efficiency to many applications; therefore, they are attractive computing platforms in a cloud environment. However, FPGA application development requires extensive hardware design knowledge which significantly limits the potential user base. Moreover, in a cloud setting, allocating a whole FPGA to a user is often wasteful and not cost effective due to low device utilization. To make FPGA application development easier, firstly, we propose a methodology that provides clean abstractions with high-level APIs and a simple execution model that supports both software and hardware execution. Secondly, to improve device utilization and share the FPGA among multiple users, we developed a lightweight runtime system that provides hardware-assisted memory virtualization and memory protection, enabling multiple applications to simultaneously execute on the device.

Original languageEnglish
Title of host publicationFPL 2016 - 26th International Conference on Field-Programmable Logic and Applications
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9782839918442
DOIs
Publication statusPublished - Sep 26 2016
Event26th International Conference on Field-Programmable Logic and Applications, FPL 2016 - Lausanne, Switzerland
Duration: Aug 29 2016Sep 2 2016

Conference

Conference26th International Conference on Field-Programmable Logic and Applications, FPL 2016
CountrySwitzerland
CityLausanne
Period8/29/169/2/16

Fingerprint

Accelerator
Field Programmable Gate Array
Particle accelerators
Field programmable gate arrays (FPGA)
Hardware
Data storage equipment
Runtime Systems
Hardware Design
Virtualization
Energy Efficiency
Application programming interfaces (API)
Computer hardware
Energy efficiency
High Energy
Computer systems
High Performance
Software
Methodology
Computing
Costs

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Computer Science Applications
  • Control and Optimization

Cite this

Asiatici, M., George, N., Vipin, K., Fahmy, S. A., & Ienne, P. (2016). Designing a virtual runtime for FPGA accelerators in the cloud. In FPL 2016 - 26th International Conference on Field-Programmable Logic and Applications [7577389] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/FPL.2016.7577389

Designing a virtual runtime for FPGA accelerators in the cloud. / Asiatici, Mikhail; George, Nithin; Vipin, Kizheppatt; Fahmy, Suhaib A.; Ienne, Paolo.

FPL 2016 - 26th International Conference on Field-Programmable Logic and Applications. Institute of Electrical and Electronics Engineers Inc., 2016. 7577389.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Asiatici, M, George, N, Vipin, K, Fahmy, SA & Ienne, P 2016, Designing a virtual runtime for FPGA accelerators in the cloud. in FPL 2016 - 26th International Conference on Field-Programmable Logic and Applications., 7577389, Institute of Electrical and Electronics Engineers Inc., 26th International Conference on Field-Programmable Logic and Applications, FPL 2016, Lausanne, Switzerland, 8/29/16. https://doi.org/10.1109/FPL.2016.7577389
Asiatici M, George N, Vipin K, Fahmy SA, Ienne P. Designing a virtual runtime for FPGA accelerators in the cloud. In FPL 2016 - 26th International Conference on Field-Programmable Logic and Applications. Institute of Electrical and Electronics Engineers Inc. 2016. 7577389 https://doi.org/10.1109/FPL.2016.7577389
Asiatici, Mikhail ; George, Nithin ; Vipin, Kizheppatt ; Fahmy, Suhaib A. ; Ienne, Paolo. / Designing a virtual runtime for FPGA accelerators in the cloud. FPL 2016 - 26th International Conference on Field-Programmable Logic and Applications. Institute of Electrical and Electronics Engineers Inc., 2016.
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