Abstract
This paper presents a compact on-chip MIMO antenna design. The proposed structure consists of one folded monopole antenna operating as main antenna and one IFA antenna serving as the diversity antenna. Antenna ground is formed by connecting the idle space in the pad ring area with the ground pads and the ground plane of the circuit. The proposed antenna is fabricated with standard CMOS process. Measurement results show that the input reflection coefficient of the main antenna is lower than -10dB from 56GHz to 65GHz, covering all four channels of the WiGig standard. The diversity antenna operates in the 56 ∼ 61GHz frequency range. -20dB isolation between antennas is achieved. The peak broadside gains of the main antenna and diversity antenna at 60GHz are -3.8dB and -6.1dB respectively. The simulated correlation coefficient between the main antenna and diversity antenna is smaller than 0.2 from 56GHz to 64GHz.
Original language | English |
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Title of host publication | 2016 IEEE MTT-S International Wireless Symposium, IWS 2016 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (Electronic) | 9781509006960 |
DOIs | |
Publication status | Published - Oct 6 2016 |
Event | 2016 IEEE MTT-S International Wireless Symposium, IWS 2016 - Shanghai, China Duration: Mar 14 2016 → Mar 16 2016 |
Conference
Conference | 2016 IEEE MTT-S International Wireless Symposium, IWS 2016 |
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Country | China |
City | Shanghai |
Period | 3/14/16 → 3/16/16 |
Keywords
- CMOS
- MIMO
- on-chip antenna
- WPAN
ASJC Scopus subject areas
- Computer Networks and Communications
- Electrical and Electronic Engineering
- Instrumentation