Abstract
Hierarchical temporal memory (HTM) is a neuromorphic algorithm that emulates sparsity, hierarchy and modularity resembling the working principles of neocortex. Feature encoding is an important step to create sparse binary patterns. This sparsity is introduced by the binary weights and random weight assignment in the initialization stage of the HTM. We propose the alternative deterministic method for the HTM initialization stage, which connects the HTM weights to the input data and preserves natural sparsity of the input information. Further, we introduce the hardware implementation of the deterministic approach and compare it to the traditional HTM and existing hardware implementation. We test the proposed approach on the face recognition problem and show that it outperforms the conventional HTM approach.
Original language | English |
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Pages (from-to) | 1-9 |
Number of pages | 9 |
Journal | Analog Integrated Circuits and Signal Processing |
Volume | 95 |
Issue number | 3 |
DOIs | |
Publication status | Accepted/In press - Mar 15 2018 |
Keywords
- Analog circuits
- Hierarchical temporal memory
- Memristors
- Rule based approach
- Spatial Pooler
ASJC Scopus subject areas
- Signal Processing
- Hardware and Architecture
- Surfaces, Coatings and Films