InAlAs/InGaAs Heterostructure FET’s Processed with Selective Reactive-Ion-Etching Gate-Recess Technology

Sambhu Agarwala, K. Nummila, Ilesanmi Adesida, Catherine Caneau, Rajaram Bhat

Research output: Contribution to journalArticle

15 Citations (Scopus)

Abstract

A newly developed highly selective reactive-ion-etching process based on HBr plasma has been applied as a gate-recess technique in the fabrication of InAlAs/InGaAs heterostructure FET’s. A typical 0.75-μm gate-length transistor exhibited a threshold voltage of —1.0 V, a maximum extrinsic transconductance of 600 mS/mm, an extrinsic current-gain cutoff frequency of 37 GHz, and a maximum frequency of oscillation of 90 GHz. These dc and RF device parameters compare favorably with that of a corresponding device gate-recessed with a selective wet-etching technique.

Original languageEnglish
Pages (from-to)425-427
Number of pages3
JournalIEEE Electron Device Letters
Volume14
Issue number9
DOIs
Publication statusPublished - Sep 1993
Externally publishedYes

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ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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