Low Power Near-sensor Coarse to Fine XOR based Memristive Edge Detection

Kamilya Smagulova, Aidana Irmanova, Alex James Pappachen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, we propose XOR based memristive edge detector circuit that is integrated into a near sensor log-linear CMOS pixel. Memristor threshold logic was used to design NAND gates, which serve as a building block for XOR gates. For validation of proposed circuit functionality hardware simulation of logic gates with a pixel pair was conducted using TSMC 0.18um technology and system-level simulation of the proposed circuit using SPICE models. The proposed method operates in low power and takes a small area on chip. The power consumption of one pixel is 1.16uW and total area 36.72 um2 without photosensing component. The power consumption of NAND circuit is 1.11pW and total area 32.4um2.

Original languageEnglish
Title of host publicationProceedings - International SoC Design Conference 2018, ISOCC 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages253-254
Number of pages2
ISBN (Electronic)9781538679609
DOIs
Publication statusPublished - Feb 22 2019
Event15th International SoC Design Conference, ISOCC 2018 - Daegu, Korea, Republic of
Duration: Nov 12 2018Nov 15 2018

Publication series

NameProceedings - International SoC Design Conference 2018, ISOCC 2018

Conference

Conference15th International SoC Design Conference, ISOCC 2018
CountryKorea, Republic of
CityDaegu
Period11/12/1811/15/18

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

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