Memristive threshold logic networks

Irina Dolzhikova, Akshay Kumar Maan, Alex James Pappachen

Research output: Chapter in Book/Report/Conference proceedingChapter

Abstract

Threshold logic gates (TLGs) are known for high-speed and low power consumption, which is essential for applications such as real-time processing and recognition of natural signals, as well as on-chip memory architecture and neural network implementation. Integration of memristors into the design allows extending the capabilities of threshold logic circuits. In this chapter, we review the hardware designs of memristive threshold logic (MTL) circuits that are inspired by the principle of neuron firing inside the brain. Variety of threshold architectures, their limitations and possible field of application are discussed.

Original languageEnglish
Title of host publicationModeling and Optimization in Science and Technologies
PublisherSpringer Verlag
Pages117-130
Number of pages14
DOIs
Publication statusPublished - Jan 1 2020

Publication series

NameModeling and Optimization in Science and Technologies
Volume14
ISSN (Print)2196-7326
ISSN (Electronic)2196-7334

Fingerprint

Threshold logic
Logic circuits
Logic
Memristors
Memory architecture
Logic gates
Neurons
Hardware Design
Brain
Electric power utilization
Power Consumption
Neural networks
Hardware
Neuron
High Speed
Chip
Neural Networks
Processing
Real-time
Architecture

ASJC Scopus subject areas

  • Modelling and Simulation
  • Medical Assisting and Transcription
  • Applied Mathematics

Cite this

Dolzhikova, I., Kumar Maan, A., & James Pappachen, A. (2020). Memristive threshold logic networks. In Modeling and Optimization in Science and Technologies (pp. 117-130). (Modeling and Optimization in Science and Technologies; Vol. 14). Springer Verlag. https://doi.org/10.1007/978-3-030-14524-8_9

Memristive threshold logic networks. / Dolzhikova, Irina; Kumar Maan, Akshay; James Pappachen, Alex.

Modeling and Optimization in Science and Technologies. Springer Verlag, 2020. p. 117-130 (Modeling and Optimization in Science and Technologies; Vol. 14).

Research output: Chapter in Book/Report/Conference proceedingChapter

Dolzhikova, I, Kumar Maan, A & James Pappachen, A 2020, Memristive threshold logic networks. in Modeling and Optimization in Science and Technologies. Modeling and Optimization in Science and Technologies, vol. 14, Springer Verlag, pp. 117-130. https://doi.org/10.1007/978-3-030-14524-8_9
Dolzhikova I, Kumar Maan A, James Pappachen A. Memristive threshold logic networks. In Modeling and Optimization in Science and Technologies. Springer Verlag. 2020. p. 117-130. (Modeling and Optimization in Science and Technologies). https://doi.org/10.1007/978-3-030-14524-8_9
Dolzhikova, Irina ; Kumar Maan, Akshay ; James Pappachen, Alex. / Memristive threshold logic networks. Modeling and Optimization in Science and Technologies. Springer Verlag, 2020. pp. 117-130 (Modeling and Optimization in Science and Technologies).
@inbook{13a058cf06804306a49c6a1cf421bb06,
title = "Memristive threshold logic networks",
abstract = "Threshold logic gates (TLGs) are known for high-speed and low power consumption, which is essential for applications such as real-time processing and recognition of natural signals, as well as on-chip memory architecture and neural network implementation. Integration of memristors into the design allows extending the capabilities of threshold logic circuits. In this chapter, we review the hardware designs of memristive threshold logic (MTL) circuits that are inspired by the principle of neuron firing inside the brain. Variety of threshold architectures, their limitations and possible field of application are discussed.",
author = "Irina Dolzhikova and {Kumar Maan}, Akshay and {James Pappachen}, Alex",
year = "2020",
month = "1",
day = "1",
doi = "10.1007/978-3-030-14524-8_9",
language = "English",
series = "Modeling and Optimization in Science and Technologies",
publisher = "Springer Verlag",
pages = "117--130",
booktitle = "Modeling and Optimization in Science and Technologies",
address = "Germany",

}

TY - CHAP

T1 - Memristive threshold logic networks

AU - Dolzhikova, Irina

AU - Kumar Maan, Akshay

AU - James Pappachen, Alex

PY - 2020/1/1

Y1 - 2020/1/1

N2 - Threshold logic gates (TLGs) are known for high-speed and low power consumption, which is essential for applications such as real-time processing and recognition of natural signals, as well as on-chip memory architecture and neural network implementation. Integration of memristors into the design allows extending the capabilities of threshold logic circuits. In this chapter, we review the hardware designs of memristive threshold logic (MTL) circuits that are inspired by the principle of neuron firing inside the brain. Variety of threshold architectures, their limitations and possible field of application are discussed.

AB - Threshold logic gates (TLGs) are known for high-speed and low power consumption, which is essential for applications such as real-time processing and recognition of natural signals, as well as on-chip memory architecture and neural network implementation. Integration of memristors into the design allows extending the capabilities of threshold logic circuits. In this chapter, we review the hardware designs of memristive threshold logic (MTL) circuits that are inspired by the principle of neuron firing inside the brain. Variety of threshold architectures, their limitations and possible field of application are discussed.

UR - http://www.scopus.com/inward/record.url?scp=85064733990&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85064733990&partnerID=8YFLogxK

U2 - 10.1007/978-3-030-14524-8_9

DO - 10.1007/978-3-030-14524-8_9

M3 - Chapter

T3 - Modeling and Optimization in Science and Technologies

SP - 117

EP - 130

BT - Modeling and Optimization in Science and Technologies

PB - Springer Verlag

ER -