Novel HEMT processing technologies and their circuit applications

I. Adesida, A. Mahajan, G. Cueva, P. Fay

Research output: Contribution to journalConference articlepeer-review

Abstract

The monolithic integration of enhancement- and depletion-mode high-electron mobility transistors (E- and D- HEMTs) suitable for high-speed and low power circuit applications in the lattice-matched InP material system is examined. E-HEMT devices with gate-lengths of 0.25, 0.5 and 1.0 μm fabricated using a buried-Pt gate process demonstrate threshold voltages (VT) ranging from + 200 to + 258 mV and maximum extrinsic transconductances (gmext) as high as 800 mS mm-1, while D-HEMT devices of identical gate-lengths exhibited a VT ranging from -599 to -405 mV, and a gmext as high as 578 mS mm-1. The devices showed excellent rf characteristics, exhibiting unity current-gain cutoff frequencies (ft) as high as 106 GHz. Based on these results, 11, 23, and 59 stage ring oscillators using direct-coupled FET logic (DCFL) technology were fabricated and characterized. Room temperature propagation delays of 9.27 ps/stage with a power-delay product of 2.37 fJ/stage were achieved.

Original languageEnglish
Pages (from-to)1333-1338
Number of pages6
JournalSolid-State Electronics
Volume43
Issue number8
DOIs
Publication statusPublished - Aug 1999
EventProceedings of the 1998 3rd Tropical Workshop on Heterostructure Microelectronics for Information Systems Applications (TWHM-ISA '98) - Hayama-Machi, Jpn
Duration: Aug 30 1998Sep 2 1998

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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