We introduce the concept of the Information Preserving Logic (IPL) based on some of the properties of reversible logic. The proposed IPL is using reversibility to dynamically recover inputs or intermediary product terms and to adaptively reconfigure itself to either a memory block or to logic processing circuit. We show that using these principles and the proposed computational model several problems in the current logic technology (such as CMOS), can be solved. In particular we show possible improvements to the heat dissipation in the Cache-CPU system, register number reduction in a computational pipeline, reversible encoding and compression and the design of the so called Universal Reversible Logic cell. Finally, to show that the logical reversibility alone can be used to implement the introduced concepts in the current technology, a Toffoli gate is implemented using adiabatic CMOS and compared to non adiabatic Toffoli gates. It is shown that our implementation of the Toffoli gate, saves power and registers when used in the reversible concepts introduced above.
|Number of pages||28|
|Journal||Journal of Multiple-Valued Logic and Soft Computing|
|Publication status||Published - 2014|
ASJC Scopus subject areas
- Theoretical Computer Science