Test generation and fault localization for quantum circuits

Marek Perkowski, Jacob Biamonte, Martin Lukac

Research output: Chapter in Book/Report/Conference proceedingConference contribution

24 Citations (Scopus)

Abstract

It is believed that quantum computing will begin to have a practical impact in industry around year 2010. We propose an approach to test generation and fault localization for a wide category of fault models. While in general we follow the methods used in test of standard circuits, there are two significant differences: (2) we use both deterministic and probabilistic tests to detect faults, (2) we use special measurement gates to determine the internal states. A Fault Table is created that includes probabilistic information. "Probabilistic set covering" and "probabilistic adaptive trees" that generalize those known in standard circuits, are next used.

Original languageEnglish
Title of host publicationProceedings of The International Symposium on Multiple-Valued Logic
Pages62-68
Number of pages7
Publication statusPublished - 2005
Externally publishedYes
Event35th International Symposium on Multiple-Valued Logic, ISMVL 2005 - Calgary, Alta., Canada
Duration: May 19 2005May 21 2005

Other

Other35th International Symposium on Multiple-Valued Logic, ISMVL 2005
CountryCanada
CityCalgary, Alta.
Period5/19/055/21/05

Fingerprint

Quantum Circuits
Test Generation
Fault
Networks (circuits)
Set Covering
Quantum Computing
Industry
Table
Internal
Generalise
Standards

ASJC Scopus subject areas

  • Hardware and Architecture
  • Logic
  • Safety, Risk, Reliability and Quality
  • Chemical Health and Safety

Cite this

Perkowski, M., Biamonte, J., & Lukac, M. (2005). Test generation and fault localization for quantum circuits. In Proceedings of The International Symposium on Multiple-Valued Logic (pp. 62-68)

Test generation and fault localization for quantum circuits. / Perkowski, Marek; Biamonte, Jacob; Lukac, Martin.

Proceedings of The International Symposium on Multiple-Valued Logic. 2005. p. 62-68.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Perkowski, M, Biamonte, J & Lukac, M 2005, Test generation and fault localization for quantum circuits. in Proceedings of The International Symposium on Multiple-Valued Logic. pp. 62-68, 35th International Symposium on Multiple-Valued Logic, ISMVL 2005, Calgary, Alta., Canada, 5/19/05.
Perkowski M, Biamonte J, Lukac M. Test generation and fault localization for quantum circuits. In Proceedings of The International Symposium on Multiple-Valued Logic. 2005. p. 62-68
Perkowski, Marek ; Biamonte, Jacob ; Lukac, Martin. / Test generation and fault localization for quantum circuits. Proceedings of The International Symposium on Multiple-Valued Logic. 2005. pp. 62-68
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