Voltage controlled memristor threshold logic gates

Akshay Kumar Maan, Alex Pappachen James

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Abstract

In this paper, we present a resistive switching memristor cell for implementing universal logic gates. The cell has a weighted control input whose resistance is set based on a control signal that generalizes the operational regime from NAND to NOR functionality. We further show how threshold logic in the voltage-controlled resistive cell can be used to implement a XOR logic. Building on the same principle we implement a half adder and a 4-bit CLA (Carry Look-ahead Adder) and show that in comparison with CMOS-only logic, the proposed system shows significant improvements in terms of device area, power dissipation and leakage power.

Original languageEnglish
Title of host publication2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages376-379
Number of pages4
ISBN (Electronic)9781509015702
DOIs
Publication statusPublished - Jan 3 2017
Event2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016 - Jeju, Korea, Republic of
Duration: Oct 25 2016Oct 28 2016

Conference

Conference2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016
CountryKorea, Republic of
CityJeju
Period10/25/1610/28/16

Fingerprint

Threshold logic
Memristors
Logic gates
Adders
Electric potential
Energy dissipation

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Signal Processing

Cite this

Maan, A. K., & James, A. P. (2017). Voltage controlled memristor threshold logic gates. In 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016 (pp. 376-379). [7803980] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APCCAS.2016.7803980

Voltage controlled memristor threshold logic gates. / Maan, Akshay Kumar; James, Alex Pappachen.

2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016. Institute of Electrical and Electronics Engineers Inc., 2017. p. 376-379 7803980.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Maan, AK & James, AP 2017, Voltage controlled memristor threshold logic gates. in 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016., 7803980, Institute of Electrical and Electronics Engineers Inc., pp. 376-379, 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016, Jeju, Korea, Republic of, 10/25/16. https://doi.org/10.1109/APCCAS.2016.7803980
Maan AK, James AP. Voltage controlled memristor threshold logic gates. In 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016. Institute of Electrical and Electronics Engineers Inc. 2017. p. 376-379. 7803980 https://doi.org/10.1109/APCCAS.2016.7803980
Maan, Akshay Kumar ; James, Alex Pappachen. / Voltage controlled memristor threshold logic gates. 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016. Institute of Electrical and Electronics Engineers Inc., 2017. pp. 376-379
@inproceedings{42d208d8191d4b3db519ec727de09fb2,
title = "Voltage controlled memristor threshold logic gates",
abstract = "In this paper, we present a resistive switching memristor cell for implementing universal logic gates. The cell has a weighted control input whose resistance is set based on a control signal that generalizes the operational regime from NAND to NOR functionality. We further show how threshold logic in the voltage-controlled resistive cell can be used to implement a XOR logic. Building on the same principle we implement a half adder and a 4-bit CLA (Carry Look-ahead Adder) and show that in comparison with CMOS-only logic, the proposed system shows significant improvements in terms of device area, power dissipation and leakage power.",
author = "Maan, {Akshay Kumar} and James, {Alex Pappachen}",
year = "2017",
month = "1",
day = "3",
doi = "10.1109/APCCAS.2016.7803980",
language = "English",
pages = "376--379",
booktitle = "2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
address = "United States",

}

TY - GEN

T1 - Voltage controlled memristor threshold logic gates

AU - Maan, Akshay Kumar

AU - James, Alex Pappachen

PY - 2017/1/3

Y1 - 2017/1/3

N2 - In this paper, we present a resistive switching memristor cell for implementing universal logic gates. The cell has a weighted control input whose resistance is set based on a control signal that generalizes the operational regime from NAND to NOR functionality. We further show how threshold logic in the voltage-controlled resistive cell can be used to implement a XOR logic. Building on the same principle we implement a half adder and a 4-bit CLA (Carry Look-ahead Adder) and show that in comparison with CMOS-only logic, the proposed system shows significant improvements in terms of device area, power dissipation and leakage power.

AB - In this paper, we present a resistive switching memristor cell for implementing universal logic gates. The cell has a weighted control input whose resistance is set based on a control signal that generalizes the operational regime from NAND to NOR functionality. We further show how threshold logic in the voltage-controlled resistive cell can be used to implement a XOR logic. Building on the same principle we implement a half adder and a 4-bit CLA (Carry Look-ahead Adder) and show that in comparison with CMOS-only logic, the proposed system shows significant improvements in terms of device area, power dissipation and leakage power.

UR - http://www.scopus.com/inward/record.url?scp=85011105460&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85011105460&partnerID=8YFLogxK

U2 - 10.1109/APCCAS.2016.7803980

DO - 10.1109/APCCAS.2016.7803980

M3 - Conference contribution

SP - 376

EP - 379

BT - 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016

PB - Institute of Electrical and Electronics Engineers Inc.

ER -