Abstract
In this paper, we present a resistive switching memristor cell for implementing universal logic gates. The cell has a weighted control input whose resistance is set based on a control signal that generalizes the operational regime from NAND to NOR functionality. We further show how threshold logic in the voltage-controlled resistive cell can be used to implement a XOR logic. Building on the same principle we implement a half adder and a 4-bit CLA (Carry Look-ahead Adder) and show that in comparison with CMOS-only logic, the proposed system shows significant improvements in terms of device area, power dissipation and leakage power.
| Original language | English |
|---|---|
| Title of host publication | 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 376-379 |
| Number of pages | 4 |
| ISBN (Electronic) | 9781509015702 |
| DOIs | |
| Publication status | Published - Jan 3 2017 |
| Event | 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016 - Jeju, Korea, Republic of Duration: Oct 25 2016 → Oct 28 2016 |
Conference
| Conference | 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016 |
|---|---|
| Country | Korea, Republic of |
| City | Jeju |
| Period | 10/25/16 → 10/28/16 |
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ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Signal Processing
Cite this
Voltage controlled memristor threshold logic gates. / Maan, Akshay Kumar; James, Alex Pappachen.
2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016. Institute of Electrical and Electronics Engineers Inc., 2017. p. 376-379 7803980.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Voltage controlled memristor threshold logic gates
AU - Maan, Akshay Kumar
AU - James, Alex Pappachen
PY - 2017/1/3
Y1 - 2017/1/3
N2 - In this paper, we present a resistive switching memristor cell for implementing universal logic gates. The cell has a weighted control input whose resistance is set based on a control signal that generalizes the operational regime from NAND to NOR functionality. We further show how threshold logic in the voltage-controlled resistive cell can be used to implement a XOR logic. Building on the same principle we implement a half adder and a 4-bit CLA (Carry Look-ahead Adder) and show that in comparison with CMOS-only logic, the proposed system shows significant improvements in terms of device area, power dissipation and leakage power.
AB - In this paper, we present a resistive switching memristor cell for implementing universal logic gates. The cell has a weighted control input whose resistance is set based on a control signal that generalizes the operational regime from NAND to NOR functionality. We further show how threshold logic in the voltage-controlled resistive cell can be used to implement a XOR logic. Building on the same principle we implement a half adder and a 4-bit CLA (Carry Look-ahead Adder) and show that in comparison with CMOS-only logic, the proposed system shows significant improvements in terms of device area, power dissipation and leakage power.
UR - http://www.scopus.com/inward/record.url?scp=85011105460&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85011105460&partnerID=8YFLogxK
U2 - 10.1109/APCCAS.2016.7803980
DO - 10.1109/APCCAS.2016.7803980
M3 - Conference contribution
AN - SCOPUS:85011105460
SP - 376
EP - 379
BT - 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016
PB - Institute of Electrical and Electronics Engineers Inc.
ER -